From 02351861824a13ed158db1ef59aede2db6ba7568 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 9 Feb 2021 23:07:42 +0000
Subject: [PATCH] mediatek: add alternative UBI NAND layout for Linksys E8450
The vendor flash layout of the Linksys E8450 is problematic as it uses
the SPI-NAND chip without any wear-leveling while at the same time
wasting a lot of space for padding.
Use an all-UBI layout instead, storing the kernel+dtb+squashfs in
uImage.FIT standard format in UBI volume 'fit', the read-write
overlay in UBI volume 'rootfs_data' as well as reduntant U-Boot
environments 'ubootenv' and 'ubootenv2', and a 'recovery'
kernel+dtb+initramfs uImage.FIT for dual-boot.
** WARNING **
THIS PROCEDURE CAN EASILY BRICK YOUR DEVICE PERMANENTLY IF NOT CARRIED
OUT VERY CAREFULLY AND EXACTLY AS DESCRIBED!
Step 0
* Configure your PC to have the static IPv4 address 192.168.1.254/24
* Provide bin/targets/mediatek/mt7622 via TFTP
Now continue EITHER with step 1A or 1B, depending on your preference
(and on having serial console wired up or not).
Step 1A (Using the vendor web interface (or non-UBI OpenWrt install))
In order to update to the new bootloader and UBI-based firmware,
use the web browser of your choice to open the routers web-interface
accessible on http://192.168.1.1
* Navigate to
'Configuration' -> 'Administration' -> 'Firmware Upgrade'
* Upload the file
openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
and proceed with the upgrade.
* Once OpenWrt comes up, use SCP to upload the new bootloader files to
/tmp on the router:
*-mt7622-linksys_e8450-ubi-preloader.bin
*-mt7622-linksys_e8450-ubi-bl31-uboot.fip
* Connect via SSH as you will now need to replace the bootloader in
the Flash.
ssh root@192.168.1.1
(the usual warnings)
* First of all, backup all the flash now:
for mtd in /dev/mtdblock*; do
dd if=$mtd of=/tmp/$(basename $mtd);
done
* Then use SCP to copy /tmp/mtdblock* from the router and keep them
safe. You will need them should you ever want to return to the
factory firmware!
* Now flow the uploaded files:
mtd -e /dev/mtd0 write /tmp/*linksys_e8450-ubi-preloader.bin /dev/mtd0
mtd -e /dev/mtd1 write /tmp/*linksys_e8450-ubi-bl31-uboot.fip /dev/mtd1
If and only if both writes look like the completed successfully
reboot the router. Now continue with step 2.
Step 1B (Using the vendor bootloader serial console)
* Use the serial to backup all /dev/mtd* devices before using the
stock firmware (you got root shell when connected to serial).
* Then reboot and select 'U-Boot Console' in the boot menu.
* Copy the following lines, one by one:
tftpboot 0x40080000 openwrt-mediatek-mt7622-linksys_e8450-ubi-preloader.bin
tftpboot 0x40100000 openwrt-mediatek-mt7622-linksys_e8450-ubi-bl31-uboot.fip
nand erase 0x0 0x180000
nand write 0x40080000 0x0 0x180000
reset
Now continue with step 2
Step 2
Once the new bootchain comes up, the loader will initialize UBI and the
ubootenv volumes. It will then of course fail to find any bootable
volume and hence resort to load kernel via TFTP from server
192.168.1.254 while giving itself the address 192.168.1.1
The requested file is called
openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
and your TFTP server should provide exactly that :)
It will be written to UBI as recovery image and booted.
You can then continue and flash the production OS image, either
by using sysupgrade in the booted initramfs recovery OS, or by using
the bootloader menu and TFTP.
That's it. Go ahead and mess around with a bootchain built almost
completely from source (only DRAM calibration blobs are fitted in bl2,
and the irreplacable on-chip ROM loader remains, of course).
And enjoy U-Boot built with many great features out-of-the-box.
You can access the bootloader environment from within OpenWrt using the
'fw_printenv' and 'fw_setenv' commands. Don't be afraid, once you got
the new bootchain installed the device should be fairly unbrickable
(holding reset button before and during power-on resets things and
allows reflashing recovery image via TFTP)
Special thanks to @dvn0 (Devan Carpenter) for providing amazingly fast
infra for test-builds, allowing for `make clean ; make -j$(nproc)` in
less than two minutes :)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../mediatek/dts/mt7622-linksys-e8450-ubi.dts | 61 +++
.../mediatek/dts/mt7622-linksys-e8450.dts | 494 ++----------------
.../mediatek/dts/mt7622-linksys-e8450.dtsi | 410 +++++++++++++++
target/linux/mediatek/image/mt7622.mk | 38 ++
.../mt7622/base-files/etc/board.d/01_leds | 3 +-
.../mt7622/base-files/etc/board.d/02_network | 18 +-
.../mt7622/base-files/lib/upgrade/platform.sh | 6 +
target/linux/mediatek/mt7622/config-5.10 | 1 +
8 files changed, 576 insertions(+), 455 deletions(-)
create mode 100644 target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
create mode 100644 target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
mode change 100755 => 100644 target/linux/mediatek/mt7622/config-5.10
diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
new file mode 100644
index 00000000000..d6cadd320c1
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450-ubi.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+/dts-v1/;
+#include "mt7622-linksys-e8450.dtsi"
+
+/ {
+ model = "Linksys E8450 (UBI)";
+ compatible = "linksys,e8450-ubi", "mediatek,mt7622";
+
+ aliases {
+ label-mac-device = &wan;
+ };
+};
+
+&snand {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x80000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "fip";
+ reg = <0x80000 0x140000>;
+ read-only;
+ };
+
+ factory: partition@1c0000 {
+ label = "factory";
+ reg = <0x1c0000 0x100000>;
+ read-only;
+ };
+
+ partition@300000 {
+ label = "ubi";
+ reg = <0x300000 0x7d00000>;
+ };
+ };
+};
+
+&wmac {
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ status = "okay";
+};
+
+&wmac1 {
+ mediatek,mtd-eeprom = <&factory 0x5000>;
+};
+
+&gmac0 {
+ mtd-mac-address = <&factory 0x7fff4>;
+};
+
+&wan {
+ mtd-mac-address = <&factory 0x7fffa>;
+};
diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450.dts b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
index 719e1d92303..b30b5d24552 100644
--- a/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450.dts
@@ -1,486 +1,106 @@
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-#include "mt7622.dtsi"
-#include "mt6380.dtsi"
+#include "mt7622-linksys-e8450.dtsi"
/ {
model = "Linksys E8450";
compatible = "linksys,e8450", "mediatek,mt7622";
aliases {
- serial0 = &uart0;
- led-boot = &led_power;
- led-failsafe = &led_power;
- led-running = &led_power;
- led-upgrade = &led_power;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
- };
-
- cpus {
- cpu@0 {
- proc-supply = <&mt6380_vcpu_reg>;
- sram-supply = <&mt6380_vm_reg>;
- };
-
- cpu@1 {
- proc-supply = <&mt6380_vcpu_reg>;
- sram-supply = <&mt6380_vm_reg>;
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- factory {
- label = "reset";
- linux,code = <KEY_RESTART>;
- gpios = <&pio 0 GPIO_ACTIVE_LOW>;
- };
-
- wps {
- label = "wps";
- linux,code = <KEY_WPS_BUTTON>;
- gpios = <&pio 102 GPIO_ACTIVE_LOW>;
- };
+ label-mac-device = &wan;
};
-
- gpio-leds {
- compatible = "gpio-leds";
-
- led_power: power_blue {
- label = "power:blue";
- gpios = <&pio 95 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
-
- power_orange {
- label = "power:orange";
- gpios = <&pio 96 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- inet_blue {
- label = "inet:blue";
- gpios = <&pio 97 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
-
- inet_orange {
- label = "inet:orange";
- gpios = <&pio 98 GPIO_ACTIVE_LOW>;
- default-state = "off";
- };
- };
-
- memory {
- reg = <0 0x40000000 0 0x40000000>;
- };
-
- reg_1p8v: regulator-1p8v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- reg_5v: regulator-5v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&bch {
- status = "okay";
};
-&btif {
- status = "okay";
-};
-
-&cir {
- pinctrl-names = "default";
- pinctrl-0 = <&irrx_pins>;
- status = "okay";
-};
-
-ð {
- pinctrl-names = "default";
- pinctrl-0 = <ð_pins>;
- status = "okay";
-
- gmac0: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "2500base-x";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
+&snand {
+ mediatek,bmt-v2;
+ mediatek,bmt-table-size = <0x1000>;
- mdio-bus {
+ partitions {
+ compatible = "fixed-partitions";
#address-cells = <1>;
- #size-cells = <0>;
-
- switch@0 {
- compatible = "mediatek,mt7531";
- reg = <0>;
- reset-gpios = <&pio 54 0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- label = "lan1";
- };
-
- port@1 {
- reg = <1>;
- label = "lan2";
- };
-
- port@2 {
- reg = <2>;
- label = "lan3";
- };
-
- port@3 {
- reg = <3>;
- label = "lan4";
- };
-
- port@4 {
- reg = <4>;
- label = "wan";
- };
-
- port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "2500base-x";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
- };
- };
-
- };
-};
-
-&pcie0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie0_pins>;
- status = "okay";
-};
-
-&pcie1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie1_pins>;
- status = "okay";
-};
-
-&slot0 {
- mt7915@0,0 {
- reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x05000>;
- };
-};
-
-&pio {
- /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
- * SATA functions. i.e. output-high: PCIe, output-low: SATA
- */
-// asm_sel {
-// gpio-hog;
-// gpios = <90 GPIO_ACTIVE_HIGH>;
-// output-high;
-// };
-
- eth_pins: eth-pins {
- mux {
- function = "eth";
- groups = "mdc_mdio", "rgmii_via_gmac2";
- };
- };
-
- irrx_pins: irrx-pins {
- mux {
- function = "ir";
- groups = "ir_1_rx";
- };
- };
+ #size-cells = <1>;
- irtx_pins: irtx-pins {
- mux {
- function = "ir";
- groups = "ir_1_tx";
+ partition@0 {
+ label = "Preloader";
+ reg = <0x00000 0x0080000>;
+ read-only;
};
- };
- pcie0_pins: pcie0-pins {
- mux {
- function = "pcie";
- groups = "pcie0_pad_perst",
- "pcie0_1_waken",
- "pcie0_1_clkreq";
+ partition@80000 {
+ label = "ATF";
+ reg = <0x80000 0x0040000>;
};
- };
- pcie1_pins: pcie1-pins {
- mux {
- function = "pcie";
- groups = "pcie1_pad_perst",
- "pcie1_0_waken",
- "pcie1_0_clkreq";
+ partition@c0000 {
+ label = "u-boot";
+ reg = <0xc0000 0x0080000>;
};
- };
- pmic_bus_pins: pmic-bus-pins {
- mux {
- function = "pmic";
- groups = "pmic_bus";
+ partition@140000 {
+ label = "u-boot-env";
+ reg = <0x140000 0x0080000>;
};
- };
- pwm7_pins: pwm1-2-pins {
- mux {
- function = "pwm";
- groups = "pwm_ch7_2";
+ factory: partition@1c0000 {
+ label = "factory";
+ reg = <0x1c0000 0x0100000>;
};
- };
- wled_pins: wled-pins {
- mux {
- function = "led";
- groups = "wled";
+ partition@300000 {
+ label = "devinfo";
+ reg = <0x300000 0x020000>;
};
- };
- /* Serial NAND is shared pin with SPI-NOR */
- serial_nand_pins: serial-nand-pins {
- mux {
- function = "flash";
- groups = "snfi";
+ partition@320000 {
+ label = "senv";
+ reg = <0x320000 0x020000>;
};
- };
- spic0_pins: spic0-pins {
- mux {
- function = "spi";
- groups = "spic0_0";
+ partition@360000 {
+ label = "bootseq";
+ reg = <0x360000 0x020000>;
};
- };
- spic1_pins: spic1-pins {
- mux {
- function = "spi";
- groups = "spic1_0";
+ partition@500000 {
+ label = "firmware1";
+ compatible = "denx,fit";
+ openwrt,cmdline-match = "mtdparts=master";
+ reg = <0x500000 0x1E00000>;
};
- };
- uart0_pins: uart0-pins {
- mux {
- function = "uart";
- groups = "uart0_0_tx_rx" ;
+ partition@2300000 {
+ label = "firmware2";
+ compatible = "denx,fit";
+ openwrt,cmdline-match = "mtdparts=slave";
+ reg = <0x2300000 0x1E00000>;
};
- };
- uart2_pins: uart2-pins {
- mux {
- function = "uart";
- groups = "uart2_1_tx_rx" ;
+ partition@4100000 {
+ label = "data";
+ reg = <0x4100000 0x1900000>;
};
- };
- watchdog_pins: watchdog-pins {
- mux {
- function = "watchdog";
- groups = "watchdog";
+ partition@5100000 {
+ label = "mfg";
+ reg = <0x5a00000 0x1400000>;
};
};
};
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm7_pins>;
- status = "okay";
-};
-
-&pwrap {
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_bus_pins>;
-
- status = "okay";
-};
-
-&sata {
- status = "disabled";
-};
-
-&sata_phy {
- status = "disabled";
-};
-
-&snfi {
- pinctrl-names = "default";
- pinctrl-0 = <&serial_nand_pins>;
- status = "okay";
-
- spi_nand@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "spi-nand";
- spi-max-frequency = <104000000>;
- reg = <0>;
-
- mediatek,bmt-v2;
- mediatek,bmt-table-size = <0x1000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "Preloader";
- reg = <0x00000 0x0080000>;
- read-only;
- };
-
- partition@80000 {
- label = "ATF";
- reg = <0x80000 0x0040000>;
- };
-
- partition@c0000 {
- label = "u-boot";
- reg = <0xc0000 0x0080000>;
- };
-
- partition@140000 {
- label = "u-boot-env";
- reg = <0x140000 0x0080000>;
- };
-
- factory: partition@1c0000 {
- label = "factory";
- reg = <0x1c0000 0x0100000>;
- };
-
- partition@300000 {
- label = "devinfo";
- reg = <0x300000 0x020000>;
- };
-
- partition@320000 {
- label = "senv";
- reg = <0x320000 0x020000>;
- };
-
- partition@360000 {
- label = "bootseq";
- reg = <0x360000 0x020000>;
- };
-
- partition@500000 {
- label = "firmware1";
- compatible = "denx,fit";
- openwrt,cmdline-match = "mtdparts=master";
- reg = <0x500000 0x1E00000>;
- };
-
- partition@2300000 {
- label = "firmware2";
- compatible = "denx,fit";
- openwrt,cmdline-match = "mtdparts=slave";
- reg = <0x2300000 0x1E00000>;
- };
-
- partition@4100000 {
- label = "data";
- reg = <0x4100000 0x1900000>;
- };
-
- partition@5100000 {
- label = "mfg";
- reg = <0x5a00000 0x1400000>;
- };
- };
- };
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spic0_pins>;
- status = "okay";
-};
-
-&spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&spic1_pins>;
- status = "okay";
-};
-
-&ssusb {
- vusb33-supply = <®_3p3v>;
- vbus-supply = <®_5v>;
- status = "okay";
-};
-
-&u3phy {
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
+&wmac {
+ mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart2_pins>;
- status = "okay";
+&wmac1 {
+ mediatek,mtd-eeprom = <&factory 0x05000>;
};
-&watchdog {
- pinctrl-names = "default";
- pinctrl-0 = <&watchdog_pins>;
- status = "okay";
+&gmac0 {
+ mtd-mac-address = <&factory 0x7fff4>;
};
-&wmac {
- mediatek,mtd-eeprom = <&factory 0x0000>;
- status = "okay";
+&wan {
+ mtd-mac-address = <&factory 0x7fffa>;
};
diff --git a/target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi b/target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
new file mode 100644
index 00000000000..23c1d183c8b
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7622-linksys-e8450.dtsi
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mt7622.dtsi"
+#include "mt6380.dtsi"
+
+/ {
+ compatible = "linksys,e8450", "mediatek,mt7622";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
+ };
+
+ cpus {
+ cpu@0 {
+ proc-supply = <&mt6380_vcpu_reg>;
+ sram-supply = <&mt6380_vm_reg>;
+ };
+
+ cpu@1 {
+ proc-supply = <&mt6380_vcpu_reg>;
+ sram-supply = <&mt6380_vm_reg>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ factory {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 102 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ led_power: power_blue {
+ label = "power:blue";
+ gpios = <&pio 95 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ power_orange {
+ label = "power:orange";
+ gpios = <&pio 96 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ inet_blue {
+ label = "inet:blue";
+ gpios = <&pio 97 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ inet_orange {
+ label = "inet:orange";
+ gpios = <&pio 98 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x40000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_5v: regulator-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&bch {
+ status = "okay";
+};
+
+&btif {
+ status = "okay";
+};
+
+&cir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&irrx_pins>;
+ status = "okay";
+};
+
+ð {
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_pins>;
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <0>;
+ reset-gpios = <&pio 54 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+
+ wan: port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_pins>;
+ status = "okay";
+};
+
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_pins>;
+ status = "okay";
+};
+
+&pio {
+ /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
+ * SATA functions. i.e. output-high: PCIe, output-low: SATA
+ */
+// asm_sel {
+// gpio-hog;
+// gpios = <90 GPIO_ACTIVE_HIGH>;
+// output-high;
+// };
+
+ eth_pins: eth-pins {
+ mux {
+ function = "eth";
+ groups = "mdc_mdio", "rgmii_via_gmac2";
+ };
+ };
+
+ irrx_pins: irrx-pins {
+ mux {
+ function = "ir";
+ groups = "ir_1_rx";
+ };
+ };
+
+ irtx_pins: irtx-pins {
+ mux {
+ function = "ir";
+ groups = "ir_1_tx";
+ };
+ };
+
+ pcie0_pins: pcie0-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie0_pad_perst",
+ "pcie0_1_waken",
+ "pcie0_1_clkreq";
+ };
+ };
+
+ pcie1_pins: pcie1-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie1_pad_perst",
+ "pcie1_0_waken",
+ "pcie1_0_clkreq";
+ };
+ };
+
+ pmic_bus_pins: pmic-bus-pins {
+ mux {
+ function = "pmic";
+ groups = "pmic_bus";
+ };
+ };
+
+ pwm7_pins: pwm1-2-pins {
+ mux {
+ function = "pwm";
+ groups = "pwm_ch7_2";
+ };
+ };
+
+ wled_pins: wled-pins {
+ mux {
+ function = "led";
+ groups = "wled";
+ };
+ };
+
+ /* Serial NAND is shared pin with SPI-NOR */
+ serial_nand_pins: serial-nand-pins {
+ mux {
+ function = "flash";
+ groups = "snfi";
+ };
+ };
+
+ spic0_pins: spic0-pins {
+ mux {
+ function = "spi";
+ groups = "spic0_0";
+ };
+ };
+
+ spic1_pins: spic1-pins {
+ mux {
+ function = "spi";
+ groups = "spic1_0";
+ };
+ };
+
+ uart0_pins: uart0-pins {
+ mux {
+ function = "uart";
+ groups = "uart0_0_tx_rx" ;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ mux {
+ function = "uart";
+ groups = "uart2_1_tx_rx" ;
+ };
+ };
+
+ watchdog_pins: watchdog-pins {
+ mux {
+ function = "watchdog";
+ groups = "watchdog";
+ };
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm7_pins>;
+ status = "okay";
+};
+
+&pwrap {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_bus_pins>;
+
+ status = "okay";
+};
+
+&sata {
+ status = "disabled";
+};
+
+&sata_phy {
+ status = "disabled";
+};
+
+&slot0 {
+ wmac1: mt7915@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ };
+};
+
+&snfi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>;
+ status = "okay";
+
+ snand: spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spic0_pins>;
+ status = "okay";
+};
+
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spic1_pins>;
+ status = "okay";
+};
+
+&ssusb {
+ vusb33-supply = <®_3p3v>;
+ vbus-supply = <®_5v>;
+ status = "okay";
+};
+
+&u3phy {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&rtc {
+ status = "disabled";
+};
+
+&watchdog {
+ pinctrl-names = "default";
+ pinctrl-0 = <&watchdog_pins>;
+ status = "okay";
+};
diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk
index dce1fb2055b..e113939e17a 100644
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@@ -6,6 +6,14 @@ else
KERNEL_LOADADDR := 0x44000000
endif
+define Build/bl2
+ $(CP) $(STAGING_DIR_IMAGE)/mt7622-$1-bl2.img $@
+endef
+
+define Build/bl31-uboot
+ $(CP) $(STAGING_DIR_IMAGE)/mt7622_$1-u-boot.fip $@
+endef
+
define Device/bpi_bananapi-r64
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R64
@@ -50,6 +58,36 @@ define Device/linksys_e8450
endef
TARGET_DEVICES += linksys_e8450
+define Device/linksys_e8450-ubi
+ DEVICE_VENDOR := Linksys
+ DEVICE_MODEL := E8450
+ DEVICE_VARIANT := UBI
+ DEVICE_ALT0_VENDOR := Belkin
+ DEVICE_ALT0_MODEL := RT3200
+ DEVICE_ALT0_VARIANT := UBI
+ DEVICE_DTS := mt7622-linksys-e8450-ubi
+ DEVICE_DTS_DIR := ../dts
+ UBINIZE_OPTS := -E 5
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ UBOOTENV_IN_UBI := 1
+ KERNEL_IN_UBI := 1
+ KERNEL := kernel-bin | gzip
+# recovery can also be used with stock firmware web-ui, hence the padding...
+ KERNEL_INITRAMFS := kernel-bin | lzma | \
+ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 128k
+ KERNEL_INITRAMFS_SUFFIX := -recovery.itb
+ IMAGES := sysupgrade.itb
+ IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
+ DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk \
+ kmod-mt7615e kmod-mt7615-firmware kmod-mt7915e \
+ u-boot-mt7622_linksys_e8450 uboot-envtools
+ ARTIFACTS := preloader.bin bl31-uboot.fip
+ ARTIFACT/preloader.bin := bl2 snand-1ddr
+ ARTIFACT/bl31-uboot.fip := bl31-uboot linksys_e8450
+endef
+TARGET_DEVICES += linksys_e8450-ubi
+
define Device/mediatek_mt7622-rfb1
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7622 rfb1 AP
diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
index e74944a65f1..1e81648d16e 100755
--- a/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
@@ -8,7 +8,8 @@ board=$(board_name)
board_config_update
case $board in
-linksys,e8450)
+linksys,e8450|\
+linksys,e8450-ubi)
ucidef_set_led_netdev "wan" "WAN" "inet:blue" "wan"
;;
esac
diff --git a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
index 3d2b9ffe498..1e4b1273a10 100755
--- a/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
@@ -12,6 +12,7 @@ mediatek_setup_interfaces()
bananapi,bpi-r64-rootdisk|\
bananapi,bpi-r64|\
linksys,e8450|\
+ linksys,e8450-ubi|\
mediatek,mt7622-rfb1)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
;;
@@ -25,26 +26,9 @@ mediatek_setup_interfaces()
esac
}
-mediatek_setup_macs()
-{
- local board="$1"
-
- case $board in
- linksys,e8450)
- wan_mac=$(mtd_get_mac_ascii devinfo wan_mac_addr)
- lan_mac=$(mtd_get_mac_ascii devinfo lan_mac_addr)
- label_mac=$wan_mac
- ;;
- esac
- [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
- [ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
- [ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
-}
-
board_config_update
board=$(board_name)
mediatek_setup_interfaces $board
-mediatek_setup_macs $board
board_config_flush
exit 0
diff --git a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
index 95ac8b5657c..2cea6ce3780 100755
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
@@ -1,5 +1,9 @@
+RAMFS_COPY_BIN='fw_printenv fw_setenv'
+RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
+
platform_do_upgrade() {
local board=$(board_name)
+ local file_type=$(identify $1)
case "$board" in
bananapi,bpi-r64-rootdisk)
@@ -7,7 +11,9 @@ platform_do_upgrade() {
#of eMMC and to the location of the kernel
get_image "$1" | dd of=/dev/mmcblk0 bs=2097152 seek=1 conv=fsync
;;
+ linksys,e8450-ubi|\
mediatek,mt7622,ubi)
+ CI_KERNPART="fit"
nand_do_upgrade "$1"
;;
linksys,e8450)
diff --git a/target/linux/mediatek/mt7622/config-5.10 b/target/linux/mediatek/mt7622/config-5.10
old mode 100755
new mode 100644
index 7fee58f2e35..e6283c37c98
--- a/target/linux/mediatek/mt7622/config-5.10
+++ b/target/linux/mediatek/mt7622/config-5.10
@@ -155,6 +155,7 @@ CONFIG_DTC=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EINT_MTK=y
+CONFIG_FIT_PARTITION=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FLATMEM_MANUAL is not set
--
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