This reverts kernel commit 1eed40043579 ("MIPS: smp-mt: Use CPU interrupt
controller IPI IRQ domain support"). With the patch applied, the kernel
hangs during boot if SMP is active.

The Lantiq IRQ controller gets registered first and it directly handles
the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks like this controller
already registers IRQ 0 - 7 and the generic driver only gets the following
IRQs starting later.

The upstream discussion can be found at
https://www.linux-mips.org/archives/linux-mips/2017-05/msg00059.html

.

Signed-off-by: Mathias Kresin <dev@kresin.me>