kernel: bump 4.9 to 4.9.96

Refresh patches, following required reworking:

ar71xx/patches-4.9/930-chipidea-pullup.patch
layerscape/patches-4.9/302-dts-support-layercape.patch
sunxi/patches-4.9/0052-stmmac-form-4-12.patch

Fixes for CVEs:
CVE-2018-1108
CVE-2018-1092

Tested on: ar71xx Archer C7 v2

Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Tested-by: Arjen de Korte <build+openwrt@de-korte.org>

include/kernel-version.mk

@@ -4,12 +4,12 @@ LINUX_RELEASE?=1
 
 LINUX_VERSION-3.18 = .71
 LINUX_VERSION-4.4 = .121
-LINUX_VERSION-4.9 = .91
+LINUX_VERSION-4.9 = .96
 LINUX_VERSION-4.14 = .34
 
 LINUX_KERNEL_HASH-3.18.71 = 5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240
 LINUX_KERNEL_HASH-4.4.121 = 44a88268b5088dc326b30c9b9133ac35a9a200b636b7268d08f32abeae6ca729
-LINUX_KERNEL_HASH-4.9.91 = 60caa752ec9fa1c426f6a2f37db3f268d0961b67a723b6443949112167b39832
+LINUX_KERNEL_HASH-4.9.96 = 826f596eb5197f8b17304649c2990dd7b766f5c79076cae79f4261c40cea877f
 LINUX_KERNEL_HASH-4.14.34 = 782b6c4c85275c382c820e1934d3e6003ef468f43cfc5e7c22bc07c331a12bb9
 
 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))

target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch

 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -534,6 +534,12 @@ config SPI_QUP
+@@ -533,6 +533,12 @@ config SPI_QUP
  	  This driver can also be built as a module.  If so, the module
  	  will be called spi_qup.
  

target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch

 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -762,6 +762,13 @@ config SPI_TLE62X0
+@@ -761,6 +761,13 @@ config SPI_TLE62X0
  	  sysfs interface, with each line presented as a kind of GPIO
  	  exposing both switch control and diagnostic feedback.
  

target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch

 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -769,6 +769,11 @@ config SPI_RB4XX_CPLD
+@@ -768,6 +768,11 @@ config SPI_RB4XX_CPLD
  	  SPI driver for the Xilinx CPLD chip present on the
  	  MikroTik RB4xx boards.
  

target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch

@@ -267,7 +267,7 @@
  		case IPV6_2292HOPOPTS:
 --- a/net/ipv6/ip6_gre.c
 +++ b/net/ipv6/ip6_gre.c
-@@ -395,7 +395,7 @@ static void ip6gre_err(struct sk_buff *s
+@@ -397,7 +397,7 @@ static void ip6gre_err(struct sk_buff *s
  		return;
  	ipv6h = (const struct ipv6hdr *)skb->data;
  	greh = (const struct gre_base_hdr *)(skb->data + offset);
@@ -795,7 +795,7 @@
  
 --- a/net/ipv4/tcp_input.c
 +++ b/net/ipv4/tcp_input.c
-@@ -3892,14 +3892,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -3894,14 +3894,16 @@ static bool tcp_parse_aligned_timestamp(
  {
  	const __be32 *ptr = (const __be32 *)(th + 1);
  

target/linux/ar71xx/patches-4.9/930-chipidea-pullup.patch

@@ -22,7 +22,7 @@
  {
  	ci_hdrc_gadget_destroy(ci);
  	ci_hdrc_host_destroy(ci);
--	if (ci->is_otg)
+-	if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
 +	if (!ci->dp_always_pullup && ci->roles[CI_ROLE_GADGET])
  		ci_hdrc_otg_destroy(ci);
  }
@@ -37,8 +37,8 @@
  	ret = hw_device_init(ci, base);
  	if (ret < 0) {
  		dev_err(dev, "can't initialize hardware\n");
-@@ -955,7 +958,7 @@ static int ci_hdrc_probe(struct platform
- 		goto deinit_phy;
+@@ -963,7 +966,7 @@ static int ci_hdrc_probe(struct platform
+ 		goto deinit_gadget;
  	}
  
 -	if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {

target/linux/ath25/patches-4.9/130-watchdog.patch

@@ -212,7 +212,7 @@
 +MODULE_ALIAS("platform:" DRIVER_NAME);
 --- a/drivers/watchdog/Kconfig
 +++ b/drivers/watchdog/Kconfig
-@@ -1554,6 +1554,13 @@ config PIC32_DMT
+@@ -1555,6 +1555,13 @@ config PIC32_DMT
  	  To compile this driver as a loadable module, choose M here.
  	  The module will be called pic32-dmt.
  

target/linux/bcm53xx/patches-4.9/400-mtd-spi-nor-detect-JEDEC-incompatible-w25q128-using-.patch

@@ -13,7 +13,7 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
 
 --- a/drivers/mtd/spi-nor/spi-nor.c
 +++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1190,6 +1190,18 @@ static const struct flash_info *spi_nor_
+@@ -1194,6 +1194,18 @@ static const struct flash_info *spi_nor_
  	}
  	dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
  		id[0], id[1], id[2]);

target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch

@@ -19,7 +19,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
 
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1266,6 +1266,15 @@ static struct clk_hw *bcm2835_register_c
+@@ -1268,6 +1268,15 @@ static struct clk_hw *bcm2835_register_c
  	init.name = data->name;
  	init.flags = data->flags | CLK_IGNORE_UNUSED;
  

target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch

@@ -13,7 +13,7 @@ Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
 
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1907,8 +1907,15 @@ static int bcm2835_clk_probe(struct plat
+@@ -1909,8 +1909,15 @@ static int bcm2835_clk_probe(struct plat
  	if (ret)
  		return ret;
  
@@ -30,7 +30,7 @@ Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
  }
  
  static const struct of_device_id bcm2835_clk_of_match[] = {
-@@ -1925,7 +1932,11 @@ static struct platform_driver bcm2835_cl
+@@ -1927,7 +1934,11 @@ static struct platform_driver bcm2835_cl
  	.probe          = bcm2835_clk_probe,
  };
  

target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch

@@ -39,7 +39,7 @@ Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
 
 --- a/drivers/usb/dwc2/hcd.c
 +++ b/drivers/usb/dwc2/hcd.c
-@@ -4366,6 +4366,9 @@ static int _dwc2_hcd_suspend(struct usb_
+@@ -4369,6 +4369,9 @@ static int _dwc2_hcd_suspend(struct usb_
  	if (!HCD_HW_ACCESSIBLE(hcd))
  		goto unlock;
  

target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch

@@ -34,7 +34,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	u32 ctl_reg;
  	u32 div_reg;
  
-@@ -1021,10 +1024,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw)
+@@ -1023,10 +1026,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw)
  	return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0;
  }
  
@@ -96,7 +96,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	struct clk_hw *parent, *best_parent = NULL;
  	bool current_parent_is_pllc;
  	unsigned long rate, best_rate = 0;
-@@ -1052,9 +1105,8 @@ static int bcm2835_clock_determine_rate(
+@@ -1054,9 +1107,8 @@ static int bcm2835_clock_determine_rate(
  		if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc)
  			continue;
  
@@ -108,7 +108,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  		if (rate > best_rate && rate <= req->rate) {
  			best_parent = parent;
  			best_prate = prate;
-@@ -1275,6 +1327,13 @@ static struct clk_hw *bcm2835_register_c
+@@ -1277,6 +1329,13 @@ static struct clk_hw *bcm2835_register_c
  	if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
  		init.flags &= ~CLK_IS_CRITICAL;
  

target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch

@@ -19,7 +19,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1874,7 +1874,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1876,7 +1876,12 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_VECCTL,
  		.div_reg = CM_VECDIV,
  		.int_bits = 4,

target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch

@@ -18,7 +18,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1033,7 +1033,7 @@ static unsigned long bcm2835_clock_choos
+@@ -1035,7 +1035,7 @@ static unsigned long bcm2835_clock_choos
  	struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
  	struct bcm2835_cprman *cprman = clock->cprman;
  	const struct bcm2835_clock_data *data = clock->data;

target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch

@@ -31,7 +31,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  };
  
  struct bcm2835_clock_data {
-@@ -1256,7 +1257,7 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1258,7 +1259,7 @@ bcm2835_register_pll_divider(struct bcm2
  	init.num_parents = 1;
  	init.name = divider_name;
  	init.ops = &bcm2835_pll_divider_clk_ops;
@@ -40,7 +40,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL);
  	if (!divider)
-@@ -1479,7 +1480,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1481,7 +1482,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLA_CORE,
  		.load_mask = CM_PLLA_LOADCORE,
  		.hold_mask = CM_PLLA_HOLDCORE,
@@ -50,7 +50,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLA_PER]	= REGISTER_PLL_DIV(
  		.name = "plla_per",
  		.source_pll = "plla",
-@@ -1487,7 +1489,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1489,7 +1491,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLA_PER,
  		.load_mask = CM_PLLA_LOADPER,
  		.hold_mask = CM_PLLA_HOLDPER,
@@ -60,7 +60,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLA_DSI0]	= REGISTER_PLL_DIV(
  		.name = "plla_dsi0",
  		.source_pll = "plla",
-@@ -1503,7 +1506,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1505,7 +1508,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLA_CCP2,
  		.load_mask = CM_PLLA_LOADCCP2,
  		.hold_mask = CM_PLLA_HOLDCCP2,
@@ -70,7 +70,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* PLLB is used for the ARM's clock. */
  	[BCM2835_PLLB]		= REGISTER_PLL(
-@@ -1527,7 +1531,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1529,7 +1533,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLB_ARM,
  		.load_mask = CM_PLLB_LOADARM,
  		.hold_mask = CM_PLLB_HOLDARM,
@@ -80,7 +80,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/*
  	 * PLLC is the core PLL, used to drive the core VPU clock.
-@@ -1556,7 +1561,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1558,7 +1563,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLC_CORE0,
  		.load_mask = CM_PLLC_LOADCORE0,
  		.hold_mask = CM_PLLC_HOLDCORE0,
@@ -90,7 +90,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLC_CORE1]	= REGISTER_PLL_DIV(
  		.name = "pllc_core1",
  		.source_pll = "pllc",
-@@ -1564,7 +1570,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1566,7 +1572,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLC_CORE1,
  		.load_mask = CM_PLLC_LOADCORE1,
  		.hold_mask = CM_PLLC_HOLDCORE1,
@@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLC_CORE2]	= REGISTER_PLL_DIV(
  		.name = "pllc_core2",
  		.source_pll = "pllc",
-@@ -1572,7 +1579,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1574,7 +1581,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLC_CORE2,
  		.load_mask = CM_PLLC_LOADCORE2,
  		.hold_mask = CM_PLLC_HOLDCORE2,
@@ -110,7 +110,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLC_PER]	= REGISTER_PLL_DIV(
  		.name = "pllc_per",
  		.source_pll = "pllc",
-@@ -1580,7 +1588,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1582,7 +1590,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLC_PER,
  		.load_mask = CM_PLLC_LOADPER,
  		.hold_mask = CM_PLLC_HOLDPER,
@@ -120,7 +120,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/*
  	 * PLLD is the display PLL, used to drive DSI display panels.
-@@ -1609,7 +1618,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1611,7 +1620,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLD_CORE,
  		.load_mask = CM_PLLD_LOADCORE,
  		.hold_mask = CM_PLLD_HOLDCORE,
@@ -130,7 +130,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLD_PER]	= REGISTER_PLL_DIV(
  		.name = "plld_per",
  		.source_pll = "plld",
-@@ -1617,7 +1627,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1619,7 +1629,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLD_PER,
  		.load_mask = CM_PLLD_LOADPER,
  		.hold_mask = CM_PLLD_HOLDPER,
@@ -140,7 +140,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLD_DSI0]	= REGISTER_PLL_DIV(
  		.name = "plld_dsi0",
  		.source_pll = "plld",
-@@ -1662,7 +1673,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1664,7 +1675,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLH_RCAL,
  		.load_mask = CM_PLLH_LOADRCAL,
  		.hold_mask = 0,
@@ -150,7 +150,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLH_AUX]	= REGISTER_PLL_DIV(
  		.name = "pllh_aux",
  		.source_pll = "pllh",
-@@ -1670,7 +1682,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1672,7 +1684,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLH_AUX,
  		.load_mask = CM_PLLH_LOADAUX,
  		.hold_mask = 0,
@@ -160,7 +160,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_PLLH_PIX]	= REGISTER_PLL_DIV(
  		.name = "pllh_pix",
  		.source_pll = "pllh",
-@@ -1678,7 +1691,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1680,7 +1693,8 @@ static const struct bcm2835_clk_desc clk
  		.a2w_reg = A2W_PLLH_PIX,
  		.load_mask = CM_PLLH_LOADPIX,
  		.hold_mask = 0,

target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch

@@ -76,7 +76,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* Must be last */
  	struct clk_hw_onecell_data onecell;
-@@ -911,6 +932,9 @@ static long bcm2835_clock_rate_from_divi
+@@ -913,6 +934,9 @@ static long bcm2835_clock_rate_from_divi
  	const struct bcm2835_clock_data *data = clock->data;
  	u64 temp;
  
@@ -86,7 +86,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	/*
  	 * The divisor is a 12.12 fixed point field, but only some of
  	 * the bits are populated in any given clock.
-@@ -934,7 +958,12 @@ static unsigned long bcm2835_clock_get_r
+@@ -936,7 +960,12 @@ static unsigned long bcm2835_clock_get_r
  	struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
  	struct bcm2835_cprman *cprman = clock->cprman;
  	const struct bcm2835_clock_data *data = clock->data;
@@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
  }
-@@ -1213,7 +1242,7 @@ static struct clk_hw *bcm2835_register_p
+@@ -1215,7 +1244,7 @@ static struct clk_hw *bcm2835_register_p
  	memset(&init, 0, sizeof(init));
  
  	/* All of the PLLs derive from the external oscillator. */
@@ -109,7 +109,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	init.num_parents = 1;
  	init.name = data->name;
  	init.ops = &bcm2835_pll_clk_ops;
-@@ -1299,18 +1328,22 @@ static struct clk_hw *bcm2835_register_c
+@@ -1301,18 +1330,22 @@ static struct clk_hw *bcm2835_register_c
  	struct bcm2835_clock *clock;
  	struct clk_init_data init;
  	const char *parents[1 << CM_SRC_BITS];
@@ -139,7 +139,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	}
  
  	memset(&init, 0, sizeof(init));
-@@ -1446,6 +1479,47 @@ static const char *const bcm2835_clock_v
+@@ -1448,6 +1481,47 @@ static const char *const bcm2835_clock_v
  	__VA_ARGS__)
  
  /*
@@ -187,7 +187,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
   * the real definition of all the pll, pll_dividers and clocks
   * these make use of the above REGISTER_* macros
   */
-@@ -1908,6 +1982,18 @@ static const struct bcm2835_clk_desc clk
+@@ -1910,6 +1984,18 @@ static const struct bcm2835_clk_desc clk
  		.div_reg = CM_DSI1EDIV,
  		.int_bits = 4,
  		.frac_bits = 8),
@@ -206,7 +206,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* the gates */
  
-@@ -1966,8 +2052,19 @@ static int bcm2835_clk_probe(struct plat
+@@ -1968,8 +2054,19 @@ static int bcm2835_clk_probe(struct plat
  	if (IS_ERR(cprman->regs))
  		return PTR_ERR(cprman->regs);
  

target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch

@@ -107,7 +107,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  };
  
  struct bcm2835_gate_data {
-@@ -1012,6 +1071,17 @@ static int bcm2835_clock_on(struct clk_h
+@@ -1014,6 +1073,17 @@ static int bcm2835_clock_on(struct clk_h
  		     CM_GATE);
  	spin_unlock(&cprman->regs_lock);
  
@@ -125,7 +125,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	return 0;
  }
  
-@@ -1778,7 +1848,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1780,7 +1850,8 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_OTPCTL,
  		.div_reg = CM_OTPDIV,
  		.int_bits = 4,
@@ -135,7 +135,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	/*
  	 * Used for a 1Mhz clock for the system clocksource, and also used
  	 * bythe watchdog timer and the camera pulse generator.
-@@ -1812,13 +1883,15 @@ static const struct bcm2835_clk_desc clk
+@@ -1814,13 +1885,15 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_H264CTL,
  		.div_reg = CM_H264DIV,
  		.int_bits = 4,
@@ -153,7 +153,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/*
  	 * Secondary SDRAM clock.  Used for low-voltage modes when the PLL
-@@ -1829,13 +1902,15 @@ static const struct bcm2835_clk_desc clk
+@@ -1831,13 +1904,15 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_SDCCTL,
  		.div_reg = CM_SDCDIV,
  		.int_bits = 6,
@@ -171,7 +171,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	/*
  	 * VPU clock.  This doesn't have an enable bit, since it drives
  	 * the bus for everything else, and is special so it doesn't need
-@@ -1849,7 +1924,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1851,7 +1926,8 @@ static const struct bcm2835_clk_desc clk
  		.int_bits = 12,
  		.frac_bits = 8,
  		.flags = CLK_IS_CRITICAL,
@@ -181,7 +181,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* clocks with per parent mux */
  	[BCM2835_CLOCK_AVEO]	= REGISTER_PER_CLK(
-@@ -1857,19 +1933,22 @@ static const struct bcm2835_clk_desc clk
+@@ -1859,19 +1935,22 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_AVEOCTL,
  		.div_reg = CM_AVEODIV,
  		.int_bits = 4,
@@ -207,7 +207,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_CLOCK_DFT]	= REGISTER_PER_CLK(
  		.name = "dft",
  		.ctl_reg = CM_DFTCTL,
-@@ -1881,7 +1960,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1883,7 +1962,8 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_DPICTL,
  		.div_reg = CM_DPIDIV,
  		.int_bits = 4,
@@ -217,7 +217,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* Arasan EMMC clock */
  	[BCM2835_CLOCK_EMMC]	= REGISTER_PER_CLK(
-@@ -1889,7 +1969,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1891,7 +1971,8 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_EMMCCTL,
  		.div_reg = CM_EMMCDIV,
  		.int_bits = 4,
@@ -227,7 +227,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* General purpose (GPIO) clocks */
  	[BCM2835_CLOCK_GP0]	= REGISTER_PER_CLK(
-@@ -1898,7 +1979,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1900,7 +1981,8 @@ static const struct bcm2835_clk_desc clk
  		.div_reg = CM_GP0DIV,
  		.int_bits = 12,
  		.frac_bits = 12,
@@ -237,7 +237,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_CLOCK_GP1]	= REGISTER_PER_CLK(
  		.name = "gp1",
  		.ctl_reg = CM_GP1CTL,
-@@ -1906,7 +1988,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1908,7 +1990,8 @@ static const struct bcm2835_clk_desc clk
  		.int_bits = 12,
  		.frac_bits = 12,
  		.flags = CLK_IS_CRITICAL,
@@ -247,7 +247,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	[BCM2835_CLOCK_GP2]	= REGISTER_PER_CLK(
  		.name = "gp2",
  		.ctl_reg = CM_GP2CTL,
-@@ -1921,40 +2004,46 @@ static const struct bcm2835_clk_desc clk
+@@ -1923,40 +2006,46 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_HSMCTL,
  		.div_reg = CM_HSMDIV,
  		.int_bits = 4,
@@ -300,7 +300,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* TV encoder clock.  Only operating frequency is 108Mhz.  */
  	[BCM2835_CLOCK_VEC]	= REGISTER_PER_CLK(
-@@ -1967,7 +2056,8 @@ static const struct bcm2835_clk_desc clk
+@@ -1969,7 +2058,8 @@ static const struct bcm2835_clk_desc clk
  		 * Allow rate change propagation only on PLLH_AUX which is
  		 * assigned index 7 in the parent array.
  		 */
@@ -310,7 +310,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  
  	/* dsi clocks */
  	[BCM2835_CLOCK_DSI0E]	= REGISTER_PER_CLK(
-@@ -1975,25 +2065,29 @@ static const struct bcm2835_clk_desc clk
+@@ -1977,25 +2067,29 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_DSI0ECTL,
  		.div_reg = CM_DSI0EDIV,
  		.int_bits = 4,

target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch

@@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
 
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1370,6 +1370,11 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1372,6 +1372,11 @@ bcm2835_register_pll_divider(struct bcm2
  	divider->div.hw.init = &init;
  	divider->div.table = NULL;
  

target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch

@@ -48,7 +48,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  		cma-192 = <0>,"-0+1-2-3-4";
 --- a/drivers/clk/bcm/clk-bcm2835.c
 +++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1302,6 +1302,8 @@ static const struct clk_ops bcm2835_vpu_
+@@ -1304,6 +1304,8 @@ static const struct clk_ops bcm2835_vpu_
  	.debug_init = bcm2835_clock_debug_init,
  };
  
@@ -57,7 +57,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
  					   const struct bcm2835_pll_data *data)
  {
-@@ -1318,6 +1320,9 @@ static struct clk_hw *bcm2835_register_p
+@@ -1320,6 +1322,9 @@ static struct clk_hw *bcm2835_register_p
  	init.ops = &bcm2835_pll_clk_ops;
  	init.flags = CLK_IGNORE_UNUSED;
  
@@ -67,7 +67,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  	pll = kzalloc(sizeof(*pll), GFP_KERNEL);
  	if (!pll)
  		return NULL;
-@@ -1371,8 +1376,10 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1373,8 +1378,10 @@ bcm2835_register_pll_divider(struct bcm2
  	divider->div.table = NULL;
  
  	if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) {
@@ -80,7 +80,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  	}
  
  	divider->cprman = cprman;
-@@ -2108,6 +2115,8 @@ static const struct bcm2835_clk_desc clk
+@@ -2110,6 +2117,8 @@ static const struct bcm2835_clk_desc clk
  		.ctl_reg = CM_PERIICTL),
  };
  
@@ -89,7 +89,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  /*
   * Permanently take a reference on the parent of the SDRAM clock.
   *
-@@ -2127,6 +2136,19 @@ static int bcm2835_mark_sdc_parent_criti
+@@ -2129,6 +2138,19 @@ static int bcm2835_mark_sdc_parent_criti
  	return clk_prepare_enable(parent);
  }
  
@@ -109,7 +109,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  static int bcm2835_clk_probe(struct platform_device *pdev)
  {
  	struct device *dev = &pdev->dev;
-@@ -2136,6 +2158,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2138,6 +2160,7 @@ static int bcm2835_clk_probe(struct plat
  	const struct bcm2835_clk_desc *desc;
  	const size_t asize = ARRAY_SIZE(clk_desc_array);
  	size_t i;
@@ -117,7 +117,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  	int ret;
  
  	cprman = devm_kzalloc(dev, sizeof(*cprman) +
-@@ -2151,6 +2174,13 @@ static int bcm2835_clk_probe(struct plat
+@@ -2153,6 +2176,13 @@ static int bcm2835_clk_probe(struct plat
  	if (IS_ERR(cprman->regs))
  		return PTR_ERR(cprman->regs);
  

target/linux/brcm47xx/patches-4.9/831-old_gpio_wdt.patch

@@ -4,7 +4,7 @@ Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
 
 --- a/drivers/watchdog/Kconfig
 +++ b/drivers/watchdog/Kconfig
-@@ -1388,6 +1388,15 @@ config WDT_MTX1
+@@ -1389,6 +1389,15 @@ config WDT_MTX1
  	  Hardware driver for the MTX-1 boards. This is a watchdog timer that
  	  will reboot the machine after a 100 seconds timer expired.