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Commit fde68cb8 authored by Chukun Pan's avatar Chukun Pan Committed by Hauke Mehrtens
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sunxi: add support for FriendlyARM NanoPi R1S H5 

Specification:
  CPU: Allwinner H5, Quad-core Cortex-A53
  DDR3 RAM: 512MB
  Network: 10/100/1000M Ethernet x 2
  USB Host: Type-A x 1
  MicroSD Slot x 1
  MicroUSB: for power input
  Debug Serial Port: 3Pin pin-header
  LED: WAN, LAN, SYS
  KEY: Reset
  Power Supply: DC 5V/2A

Installation:
  Write the image to SD Card with dd.

Note:
  1. OpenWrt currently does not support LED_FUNCTION, change back to the
     previous practice (Consistent with NanoPi R1).
  2. Since the upstream commit https://github.com/torvalds/linux/bbc4d71


     ("net: phy: realtek: fix rtl8211e rx/tx delay config"), we need to
     change the phy-mode from rgmii to rgmii-id.
     So set phy-mode for 5.4 and 5.10 respectively.

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
parent e43eb16e
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with 587 additions and 19 deletions
target/linux/sunxi/base-files/etc/board.d/01_leds
+ 2
− 1
View file @ fde68cb8
...@@ -7,7 +7,8 @@ boardname="${board##*,}" ...@@ -7,7 +7,8 @@ boardname="${board##*,}"
board_config_update board_config_update
case $board in case $board in
friendlyarm,nanopi-r1) friendlyarm,nanopi-r1|\
friendlyarm,nanopi-r1s-h5)
ucidef_set_led_netdev "wan" "WAN" "nanopi:green:wan" "eth0" ucidef_set_led_netdev "wan" "WAN" "nanopi:green:wan" "eth0"
ucidef_set_led_netdev "lan" "LAN" "nanopi:green:lan" "eth1" ucidef_set_led_netdev "lan" "LAN" "nanopi:green:lan" "eth1"
;; ;;
......
target/linux/sunxi/base-files/etc/board.d/02_network
+ 45
− 18
View file @ fde68cb8
...@@ -3,27 +3,54 @@ ...@@ -3,27 +3,54 @@
# #
. /lib/functions/uci-defaults.sh . /lib/functions/uci-defaults.sh
. /lib/functions/system.sh
board_config_update sunxi_setup_interfaces()
{
local board="$1"
case "$board" in
friendlyarm,nanopi-r1|\
friendlyarm,nanopi-r1s-h5)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
lamobo,lamobo-r1)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
;;
olimex,a20-olinuxino-micro)
ucidef_set_interface_lan "wlan0"
;;
xunlong,orangepi-r1)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
*)
ucidef_set_interface_lan "eth0"
;;
esac
}
sunxi_setup_macs()
{
local board="$1"
local lan_mac=""
local wan_mac=""
local label_mac=""
case $(board_name) in case "$board" in
friendlyarm,nanopi-r1) friendlyarm,nanopi-r1s-h5)
ucidef_set_interfaces_lan_wan "eth1" "eth0" lan_mac=$(get_mac_binary "/sys/bus/i2c/devices/0-0051/eeprom" 0xfa)
;; ;;
lamobo,lamobo-r1) esac
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
;;
olimex,a20-olinuxino-micro)
ucidef_set_interface_lan "wlan0"
;;
xunlong,orangepi-r1)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
*)
ucidef_set_interface_lan "eth0"
;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
}
board_config_update
board=$(board_name)
sunxi_setup_interfaces $board
sunxi_setup_macs $board
board_config_flush board_config_flush
exit 0 exit 0
target/linux/sunxi/cortexa53/config-5.10
+ 1
− 0
View file @ fde68cb8
...@@ -26,6 +26,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y ...@@ -26,6 +26,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DWMAC_SUN8I=y CONFIG_DWMAC_SUN8I=y
CONFIG_EEPROM_AT24=y
# CONFIG_FLATMEM_MANUAL is not set # CONFIG_FLATMEM_MANUAL is not set
CONFIG_FRAME_POINTER=y CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
......
target/linux/sunxi/cortexa53/config-5.4
+ 1
− 0
View file @ fde68cb8
...@@ -69,6 +69,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y ...@@ -69,6 +69,7 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DRM_RCAR_WRITEBACK=y CONFIG_DRM_RCAR_WRITEBACK=y
CONFIG_DWMAC_SUN8I=y CONFIG_DWMAC_SUN8I=y
CONFIG_EEPROM_AT24=y
CONFIG_EFI_EARLYCON=y CONFIG_EFI_EARLYCON=y
# CONFIG_FLATMEM_MANUAL is not set # CONFIG_FLATMEM_MANUAL is not set
CONFIG_FRAME_POINTER=y CONFIG_FRAME_POINTER=y
......
target/linux/sunxi/image/cortexa53.mk
+ 9
− 0
View file @ fde68cb8
...@@ -40,6 +40,15 @@ define Device/friendlyarm_nanopi-neo2 ...@@ -40,6 +40,15 @@ define Device/friendlyarm_nanopi-neo2
endef endef
TARGET_DEVICES += friendlyarm_nanopi-neo2 TARGET_DEVICES += friendlyarm_nanopi-neo2
define Device/friendlyarm_nanopi-r1s-h5
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := Nanopi R1S H5
DEVICE_PACKAGES := kmod-gpio-button-hotplug kmod-usb-net-rtl8152
SUPPORTED_DEVICES:=nanopi-r1s-h5
$(Device/sun50i-h5)
endef
TARGET_DEVICES += friendlyarm_nanopi-r1s-h5
define Device/libretech_all-h3-cc-h5 define Device/libretech_all-h3-cc-h5
DEVICE_VENDOR := Libre Computer DEVICE_VENDOR := Libre Computer
DEVICE_MODEL := ALL-H3-CC DEVICE_MODEL := ALL-H3-CC
......
target/linux/sunxi/patches-5.10/101-sunxi-h5-add-support-for-nanopi-r1s-h5.patch 0 → 100644
+ 230
− 0
View file @ fde68cb8
From 9962cb9be2db877c232aaf00db40125c0d7bf4bc Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Mon, 17 May 2021 00:35:22 +0800
Subject: [PATCH] arm64: dts: allwinner: h5: Add NanoPi R1S H5 support
The NanoPi R1S H5 is a open source board made by FriendlyElec.
It has the following features:
- Allwinner H5, Quad-core Cortex-A53
- 512MB DDR3 RAM
- 10/100/1000M Ethernet x 2
- RTL8189ETV WiFi 802.11b/g/n
- USB 2.0 host port (A)
- MicroSD Slot
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210516163523.9484-2-amadeus@jmu.edu.cn
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 195 ++++++++++++++++++
2 files changed, 196 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-li
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2021 Chukun Pan <amadeus@jmu.edu.cn>
+ *
+ * Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "FriendlyARM NanoPi R1S H5";
+ compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &rtl8189etv;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sys {
+ label = "nanopi:red:sys";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ lan {
+ label = "nanopi:green:lan";
+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan {
+ label = "nanopi:green:wan";
+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0>, <1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ eeprom@51 {
+ compatible = "microchip,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8189etv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
target/linux/sunxi/patches-5.10/431-arm64-dts-allwinner-nanopi-r1s-h5-add-status-LED.patch 0 → 100644
+ 35
− 0
View file @ fde68cb8
From 1845163a052efac124f00656eb72f38947630a42 Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Sun, 10 Oct 2021 21:50:18 +0800
Subject: [PATCH] arm64: dts: allwinner: NanoPi R1S H5: add status LED aliases
Use the SYS LED on the casing for showing system status.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -22,6 +22,11 @@
ethernet0 = &emac;
ethernet1 = &rtl8189etv;
serial0 = &uart0;
+
+ led-boot = &led_sys;
+ led-failsafe = &led_sys;
+ led-running = &led_sys;
+ led-upgrade = &led_sys;
};
chosen {
@@ -31,7 +36,7 @@
leds {
compatible = "gpio-leds";
- sys {
+ led_sys: sys {
label = "nanopi:red:sys";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
target/linux/sunxi/patches-5.4/101-sunxi-h5-add-support-for-nanopi-r1s-h5.patch 0 → 100644
+ 229
− 0
View file @ fde68cb8
From 9962cb9be2db877c232aaf00db40125c0d7bf4bc Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Mon, 17 May 2021 00:35:22 +0800
Subject: [PATCH] arm64: dts: allwinner: h5: Add NanoPi R1S H5 support
The NanoPi R1S H5 is a open source board made by FriendlyElec.
It has the following features:
- Allwinner H5, Quad-core Cortex-A53
- 512MB DDR3 RAM
- 10/100/1000M Ethernet x 2
- RTL8189ETV WiFi 802.11b/g/n
- USB 2.0 host port (A)
- MicroSD Slot
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210516163523.9484-2-amadeus@jmu.edu.cn
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 195 ++++++++++++++++++
2 files changed, 196 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-em
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2021 Chukun Pan <amadeus@jmu.edu.cn>
+ *
+ * Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "FriendlyARM NanoPi R1S H5";
+ compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &rtl8189etv;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sys {
+ label = "nanopi:red:sys";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ lan {
+ label = "nanopi:green:lan";
+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan {
+ label = "nanopi:green:wan";
+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0>, <1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ eeprom@51 {
+ compatible = "microchip,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8189etv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
target/linux/sunxi/patches-5.4/431-arm64-dts-allwinner-nanopi-r1s-h5-add-status-LED.patch 0 → 100644
+ 35
− 0
View file @ fde68cb8
From 1845163a052efac124f00656eb72f38947630a42 Mon Sep 17 00:00:00 2001
From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Sun, 10 Oct 2021 21:50:18 +0800
Subject: [PATCH] arm64: dts: allwinner: NanoPi R1S H5: add status LED aliases
Use the SYS LED on the casing for showing system status.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -21,6 +21,11 @@
ethernet0 = &emac;
ethernet1 = &rtl8189etv;
serial0 = &uart0;
+
+ led-boot = &led_sys;
+ led-failsafe = &led_sys;
+ led-running = &led_sys;
+ led-upgrade = &led_sys;
};
chosen {
@@ -30,7 +35,7 @@
leds {
compatible = "gpio-leds";
- sys {
+ led_sys: sys {
label = "nanopi:red:sys";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
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