- Feb 17, 2022
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Birger Koblitz authored
Adds support for detecting RTL9303 SoCs as found e.g. in the Ubiquiti USW switch. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
We were using the PHY-ids (the reg entries in the PHY sections of the .dts) as the port numbers. Now scan the ports section in the .dts, and use the actual port numbers, following the phy-handle to the PHY properties. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
When a port is brought up, read the SDS-id via the phy_device for a given port and use this to configure the SDS when it is brought up. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The RTL839X does not have an internal phy and thus does not need to have any firmware as part of the kernel, especially not firmware for the RTL838X. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Improves the IRQ request code by using platform_get_irq() which provides better error handling. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
This adds the RTL931X sub-target in the realtek target Makefile. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Selects the new CEVT timer for Realtek instead of the previous timer driver. While we are at it, we explicitily state we do not use the I2C driver of the RTL9300. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The RTL9300 has a broken R4K MIPS timer interrupt, however, the R4K clocksource works. We replace the RTL9300 timer with a Clock Event Timer (CEVT), which is VSMP aware and can be instantiated as part of brining a VSMTP cpu up instead of the R4K CEVT source. For this we place the RTL9300 CEVT timer in arch/mips/kernel together with other MIPS CEVT timers, initialize the SoC IRQs from a modified smp-mt.c and instantiate each timer as part of the MIPS time setup in arch/mips/include/asm/time.h instead of the R4K CEVT, similarly as is done by other MIPS CEVT timers. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Various fixes to enable Ethernet on the RTL931X: - Network start and stop sequence for RTL931X HW - MDIO access on RTL931X SoC - Chip initialization - SerDes setup Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Do not lock the register structure in IRQ context. It is not necessary and leads to lockups under SMP load. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Correct offset in RX tag structure. Correct offload decision flagging. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Adds RTL931X SerDes access functions as needed by the Ethernet driver. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Fix the update counter of the RX ring, add SDS access functions for RTL931X. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Rename the SoC-specific rtl838x_reg structure in the Ethernet driver to avoid confusion with the structure of the same name in the DSA driver. New name is: rtl838x_eth_reg Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Setting bits 20 and 23 in a u16 is obviously wrong. According to https://www.svanheule.net/realtek/cypress/cputag cpu_tag[2] starts at bit 48 in the cpu-tag structure, so bit 43 is bit 5 in cpu_tag[2] and bit 40 is bit 8 in cpu_tag[2]. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Set CONFIG_FORCE_MAX_ZONEORDER setting to 13 to allow larger contiguous memory allocation for the DMA of the Ethernet driver. Increase the number of entries in the RX ring to 300 making use of the larger DMA region now possible for receiveing packets. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The GS1900-48 is a 48 + 2 port Gigabit L2 switch with 48 gigabit ports. Hardware: RTL8393M SoC Macronix MX25l12805D (16MB flash) 128MB RAM 6 * RTL8218B external PHY 2 * RTL8231 GPIO extenders to control the port LEDs, system LED and Reset button 2 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules. Power is supplied via a 230 volt mains connector. The board has a hard reset switch SW1, which is is not reachable from the outside. J4 provides a 12V RS232 serial connector which is connected through U8 to the 3.3V UART of the RTL8393. Conversion is done by U8, a SIPEX 3232EC. To connect to the UART, wires can be soldered to R603 (TX) and R602 (RX). Installation: Install the squashfs image via Realtek's original Web-Interface. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Update the IRQ configuration to work with the new rtl-intc controller. Also change all KSEG1 addresses in reg = <> of the devics to physical addresses. Use the new gpio-otto controller instead of the legacy driver. Also remove the memory node as this is better put into a device .dts. Also remove the RTL8231 GPIO controller node from this base file since the chip might not be found in all Realtek RTL839x devices. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Replace the interrupt controller node with the new realtek,rtl-intc node and change all device interrupts to use the 2 field notation: interrupts = <[SoC IRQ] [Index to MIPS IRQ]> Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
In order to support VSMP, enable support for both VPEs of the RTL839X and RTL930X SoCs in the irq-realtek-rtl driver. Add support for IRQ affinity setting. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Adds a dedicated kernel configuration for RTL839X SoCs enabling SMP. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Adds Multithreading support functions in prom.c. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
In order for the Platform includes to be available on all sub-targets, make them dependent on CONFIG_RTL83XX. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The RTL838X SoCs do not use Aquantia PHYs, remove this. Also the RTL838X uses a high resolution R4K timer. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Creates RTL83XX as a basic kernel config parameter for the RTL838X, RTL839x, RTL930X and RTL931X platforms with respective configurations for the SoCs, which are introduced in addition. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Create the RTL838x specific Makefiles. Move CPU-type into rtl838x.mk as this is specifc to that platform. Add rtl838x subtarget into main Makefile. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Move the generic kernel configs to the rtl838x sub-target. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
Adds the initial Makefile for the RTL839x sub-architecture. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
This defines the sub-target specific properties for the RTL838X sub-target. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
mv generic/target.mk to rtl838x/target.mk in order to create an initial makefile for the rtl838x sub-architecture Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The EEPROMs on SFP modules are compatible both to I2C as well as SMBus. However, the kernel so far only supports I2C access. We add SMBus access routines, because the I2C driver for the RTL9300 HW only supports that protocol. At the same time we disable I2C access to PHYs on SFP modules as otherwise detection of any SFP module would fail. This is not in any way problematic at this point in time since the RTL93XX platform so far does not support PHYs on SFP modules. The patches are copied and rebased version of: https://bootlin.com/blog/sfp-modules-on-a-board-running-linux/ Signed-off-by:
Daniel Golle <daniel@makrotopia.org> Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C masters, each with a fixed SCL pin, that cannot be changed. Each of these masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA. This multiplexer directly controls the two masters and their shared IO configuration registers to allow multiplexing between any of these busses. The two masters cannot be used in parallel as the multiplex is protected by a standard multiplex lock. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
This adds support for the RTL9300 and RTL9310 I2C controller. The controller implements the SMBus protocol for SMBus transfers over an I2C bus. The driver supports selecting one of the 2 possible SCL pins and any of the 8 possible SDA pins. Bus speeds of 100kHz (standard speed) and 400kHz (high speed I2C) are supported. Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
This patch removes support for the legacy GPIO driver, since now the gpio-otto driver can be used on all platforms Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Birger Koblitz authored
We add support for the RTL930X and RTL931X architectures in the gpio-realtek-otto.c driver. Signed-off-by:
Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by:
Birger Koblitz <git@birger-koblitz.de>
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Daniel Golle authored
Drop patches and files for Linux 5.4 now that we've been using 5.10 for a while and support for Linux 5.4 has gone out-of-sync. Signed-off-by:
Daniel Golle <daniel@makrotopia.org>
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Daniel Golle authored
For sysupgrade on NAND/UBI devices there is the U-Boot environment variable rootfs_data_max which can be used to limit the size of the rootfs_data volume created on sysupgrade. This stopped working reliable with recent kernels, probably due to a race condition when reading the number of free erase blocks from sysfs just after removing a volume. Change the script to just try creating rootfs_data with the desired size and retry with maximum size in case that fails. Hence calculating the available size in the script can be dropped which works around the problem. Signed-off-by:
Daniel Golle <daniel@makrotopia.org>
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Stijn Tintel authored
Signed-off-by:
Stijn Tintel <stijn@linux-ipv6.be> Acked-by:
Jo-Philipp Wich <jo@mein.io>
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Rui Salvaterra authored
We've been bumped to 5.10, no need to carry this stuff anymore. Signed-off-by:
Rui Salvaterra <rsalvaterra@gmail.com>
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- Feb 16, 2022
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Felix Fietkau authored
The bit position mask was accidentally made too wide, overlapping with the LSB from the byte position mask. This caused ECC calculation to fail for odd bytes Signed-off-by:
Chad Monroe <chad.monroe@smartrg.com> Signed-off-by:
Felix Fietkau <nbd@nbd.name>
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